VRIR specifications

Array-based languages, such as MATLAB and Python’s NumPy library, usually share some common features. For example, both MATLAB and Python have matrix multiplication built-in to the language and offer support for array slicing operators. Details of the exact semantics of some array operators may vary slightly, but the basic ideas are substantially similar. Languages like MATLAB and especially Python also offer many general-purpose language constructs (such as classes), but we are not interested in those constructs in this document. We focus only on the numerical portions of the program, which typically use arrays, array-operators and common control structures such as for-loops, if/else statements and functions. Recently, there has been some interest and activity in building compilers for array-based languages to GPUs and multi-cores. Such compilers have typically focused on compiling numerical sections of the program because numerical sections are often the most performance critical section of scientific programs and also the most amenable to acceleration using a GPU. The challenges of efficiently compiling the array-based parts of a program to CPUs and GPUs are similar across languages. However, compiler development for these languages currently occurs in isolation. Work done on a Python compiler does not benefit the MATLAB community and vice-versa. We want to build a common compiler toolkit, called Velociraptor, that can be reused by different compiler writers for compiling numerical parts of a program written in array-based languages. Velociraptor is dynamic code-generation toolkit that generates CPU and GPU code from VRIR. The first step of building such a compiler infrastructure is the specification of a common intermediate representation (IR). We propose an IR called VRIR (abbreviated for Velociraptor IR) for representing the numerical computation parts of the program. The idea is as follows. A dynamic compiler for a array-based language will perform analysis such as type inference, identify numerical sections of the program and then generate VRIR for numerical parts of the program. Non-numerical parts can be handled in any suitable way. Numerical sections compiled to VRIR will be passed to Velociraptor, which will perform code-generation for CPUs and GPUs. With this background, we now present the design and specifications of VRIR.